Common Analysis of Neutral Point Voltage of Three-level NPC

　　Inverter

　　Qinglong Zhong, Zhen Cao, Hover Li, Hongjian Gan, Jingping Ying

　　Delta Electronics (ShangHai) Co., LTD, People's Republic of China

　　Email: zhong.qinglong@deltaww.com.cn

　　Abstract

　　In the three-level NPC (Neutral Point Clamped) inverter, the deviation of neutral point voltage will cause 　unbalance voltage stress on switches and produce more output harmonics. In this paper, the influencing elements are analyzed mathematically. It is proving that neutral point voltage will have no dc component deviation when PWM sequences of three phases don’t contain any even-order harmonics.When PWM sequences contain some even-order harmonics, it will produce dc component deviation of neutral point voltage and the deviation is mainly affected by even-order harmonics contained in PWM sequences, which will get worse in asymmetrical load. But in symmetrical load, the rating of load has no affection on dc component deviation, while the tolerance between upper and lower capacitor almost 　　has no influence either. Finally, simulation results verified the theoretical analysis.

　　1. Introduction

　    　The three-level NPC inverter has been increasingly used in medium voltage driver (MVD) since it reduces voltage stress on power switches and outputs voltage with low THD compared to the two-level inverter. A typical configuration of three-level NPC inverter is shown in Fig.1. The node ‘O’ is the neutral point of two dc capacitors. The neutral point voltage of three-level NPC inverter tends to deviate during operating. The deviation voltage will cause uneven voltage 　stress on power switches and produce more harmonics in output voltage.

        There are many papers in which the elements that influence the dc component deviations or ac component oscillations of neutral point voltage in three-level NPC inverter are analyzed [1-4]. But they are based either on symmetry load (Za=Zb=Zc) or on some restrictions to PWM sequences of three phases. This paper will present a common analysis from mathematical point of view on dc component deviations. The common analysis is suitable to asymmetrical load(Za≠Zb≠Zc) and all PWM sequences of three phases.

　　2. Theoretical analysis

　　From Fig.1, the voltage deviation vδ(t) of dc capacitors can be defined as (1). And neutral point current inp(t) is given by (2).

　So when C1=C2=C, the relation between voltage deviation vδ(t) and neutral point current inp(t) is given by (3).

　　Switching sequences of three phases a, b, and c are Sa(t), Sb(t) and Sc(t) which can be defined as (4). Then neutral point current inp(t) is given by (5). And the phase voltages vaO(t), vbO(t) and vcO(t) can be expressed by (6) [2].

　The theoretical analysis of Ref.[2] is based on symmetry load (Za=Zb=Zc). The common analysis presented in this paper is based on asymmetry load (Za≠Zb≠Zc). In asymmetry load, equivalent transformation of the load connection form ‘Y’ to to ‘Δ’ is needed shown in Fig.2. Admittances: Gx=1/Zx, Gxy=GxGy/(Ga+Gb+Gc), where x,y=a,b,c. So phase currents of load can be calculated as (8).

　From (3), it can be known that dc component of voltage deviation vδ(t) is only influenced by dc component of inp(t). So (9) is gotten by changing equation (5) time domain to frequency domain by using convolution theorem for Fourier transforms, where * denotes convolution. Then dc component of inp(t) can be calculated by giving ϖ = 0 :

　After changing equation (8) time domain to  frequency domain, then substituting it to (10):

　where:

      In different PWM sequences of three phases (Sa(t), Sb(t) and Sc(t)), Inp1(0) may have different value defined as (14).

Where: x, y=a, b, c.
So:

Combining (14) and (17) with (3), the dc component of voltage deviation is given by (19):

        When K>0, vδ,dc will be converged to naturally balance at the value of m/K despite any initial value. The case K=0 is that resistance of load is zero or Sa(t), Sb(t) and Sc(t) are the same, which is impractical.

When K>0, vδ,dc will be converged to naturally balance at the value of m/K despite any initial value. The case K=0 is that resistance of load is zero or Sa(t), Sb(t) and Sc(t) are the same, which is impractical.

　　When PWM sequences of three phases don’t contain any even-order harmonics, the value of m/K equals zero.

　　When PWM sequences of three phases contain some even-order harmonics, value of m/K won’t be zero. In symmetry load (Ga=Gb=Gc=G and Gab=Gbc=Gca=G), the value of voltage deviation m/K has no relationship with the value of and admittance G form equation (11). But in asymmetry load (Ga≠Gb≠Gc≠G and Gab≠Gbc≠Gca≠G), the value of m/K will get worse as degree of asymmetry increases.

　　By the way, in different power factors of load, the value of m/K will be different. And the tolerance between upper and lower capacitor almost has no influence to the value of m/K.

　　Fig.5 shows deviation balance proceedings with condition: symmetry load, fc=1050Hz, the pulse of first switch of phase a (Sa1) losses 15μs at the beginning of each duty cycle. It verifies that the neutral point will have dc component eviationwhen PWM sequences of three phases contain even-order harmonics. The value of impedance of symmetrical load or capacitors has no influence to the value of voltage deviation m/K.

　　Fig.6 shows deviation balance proceedings with condition: C1=C2=2200μF, asymmetry load (Za=10ohm+40mH, Zb=12ohm+50mH, Zc=8ohm+30mH), fc=1050Hz, the pulse of first switch of phase a (Sa1) losses 15μs at the 　beginning of each duty cycle. It verifies that value of dc component deviation m/K gets worse compared to Fig.5(a) (In Fig.5(a), m/K measures 110V approximately, and 120V in Fig.6).

　　4. Conclusions

　　The paper presents a common analysis mathematically on the dc component deviation of neutral point voltage in three-level NPC inverter.It is proving that neutral point voltage will have no dc component deviation when PWM sequences of three phases don’t contain any even-order harmonics, resistance of load is non-zero and PWM sequences of three phases Sa(t), Sb(t) and Sc(t) are not the same. When PWM sequences contain some even-order harmonics, it will　　produce dc component deviation of neutral point voltage and the deviation is mainly affected by even-order harmonics contained in PWM sequences, which will get worse in asymmetrical load. But in symmetrical load, the rating of load　　has no affection on dc component deviation,while the tolerance between upper and lower capacitor almost has no influence either. The simulation results verified the theoretical analysis.

       5. Literature  

　　[1] A. Nabae, I. Takahashi, and H. Akagi. A new neutral-point-clamped PWM inverter, IEEE Trans. Ind. Application., vol. IA-17, pp. 518–523, Sept./Oct., 1981.

　　[2] C. Liu, B. Wu, D. Xu, N. Zargari, S. Rizzo. Progressive Natural Balance of Neutral-Point Voltage of Three-Level NPC Inverter With a Modified SVM Scheme. IEEE APEC, pp.1666-1669, 2006.

　　[3] H. du Toit Mouton. Natural Balancing of Three-Level Neutral-Point-Clamped PWM Inverters, IEEE Trans. On IE., vol.49, No.5, pp.1017-1025, Oct., 2002.

　　[4] I.M. Salagae, H.du T. Mouton. Natural Balancing Of Neutral-Point-Clamped Converters Under POD Pulse Width Modulation, IEEE PESC, pp. 47-52, June,2003.

　　3. Simulation results

　　Simulations with Matlab have been done using SPWM control with modulation index 0.8 and Vdc=1000V.

　　Fig.3 shows the waveforms of line voltage vab with parameters: C1=C2=2200μF, symmetry load (Za=Zb=Zc=10ohm+40mH), carrier frequency fc=1050Hz.

　　Fig.4 shows that the dc component deviation of neutral point of three-level NPC inverter will naturally balance at different initial deviation voltage with parameters: C1=C2=2200μF, asymmetry load (Za=10ohm+40mH,　Zb=12ohm+50mH, Zc=8ohm+30mH), fc=1050Hz. In this condition, the PWM sequences of three phases (Sx(t)) don’t contain any even-order harmonics, so there is no dc component deviation to neutral point.